VHDL VGA中的综合问题Signal colour cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release. patter: proce

VHDL VGA中的综合问题Signal colour cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release. patter: proce
VHDL VGA中的综合问题
Signal colour cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release.
patter: process (x,y,mode,clk25,rst,colour)
variable count:integer range 0 to 25000000;
begin

case mode is
when "00" =>
if clk25'event and clk25 = '1' then
count:=count+1;
if count =25000000 then
colour
if clk25'event and clk25='1' then
if x =80 then
colour

VHDL VGA中的综合问题Signal colour cannot be synthesized, bad synchronous description. The description style you are using to describe a synchronous element (register, memory, etc.) is not supported in the current software release. patter: proce
一个进程里只能有一个 if clk25'event and clk25='1' then
建议在if clk25'event and clk25='1' then 后再写case when .